In this master thesis, the computations in convolutional neural networks (CNNs) will be converted into digital logic circuits to reduce the energy consumption in executing multiply-accumulate (MAC) operations in CNNs. The following figure illustrates this concept. In such circuits, weights in CNNs are embedded into the logic circuits to avoid data movement, so that the energy consumption incurred by data movement can be avoided.

To realize this conversion, first, CNNs need to be quantized and pruned. Afterwards, the combinations of input bits and output bits of a neuron will be enumerated to construct a truth table. This truth table will be synthesized into digital circuits. To reduce the netlist, each filter in CNNs will be examined to simplify the truth table. Further techniques such as retraining and iterative conversion will be used to enhance the inference accuracy of the resulting circuits