Dynamic power allocation for hierarchical neural networks on FPGAs

Master thesis

Although many problems are formulated as flat classification tasks, they are often inherently hierarchical. For example, the classes in the CIFAR-10 dataset can be grouped into broader categories: “vehicle” (airplane, automobile, ship, truck) and “animal” (bird, cat, deer, dog, frog, horse). The right figure shows a hierarchical classification for a neural network. Leveraging such hierarchical structures can provide valuable insights and support flat classification results. Additionally, these structures offer natural approximations of the original problem when computational resources are limited.

In this thesis, you will learn how to design and train hierarchical neural networks that generate both coarse- and fine-grained classifications. You will also implement these networks on an FPGA to compare the power consumption required to compute results at different levels of the hierarchy