Workshop TuZ 2024

36th ITG / GMM / GI -Workshop Test Methods and Reliability of Circuits and Systems

25 – 27 February 2024

The workshop “Test Methods and Reliability of Circuits and Systems”, organized by the Gesellschaft für Informatik, the VDE/VDI-Gesellschaft Mikroelektronik, Mikrosystem- und Feinwerktechnik and the Informationstechnische Gesellschaft im VDE, is the most important German-speaking forum to discuss trends, results and current problems in the field of test, diagnosis and reliability of digital, analog, mixed-signal and RF circuits. The exchange of ideas is an important concern of the workshop.

Submissions / Call for Papers

The scope includes contributions discussing industrial practice as well as research. We strongly welcome practice-related technical reports and results as well as contributions presenting theoretical work from the following areas:

  • Adaptive systems (e.g. self-repair, self-healing, self-awareness)
  • Automatic test equipment, test automation, test programs and test modelling
  • Defect and failure modeling
  • Diagnosis of failure causes
  • Fault tolerance, resilience, robust and radiation-resistant systems
  • Functional safety
  • Hardware-oriented test and hardware-oriented safety
  • Statistical and machine learning techniques for test and reliability
  • System test and reliability
  • Test and simulation of mixed-signal, RF and analog circuits
  • Test generation, fault simulation, self-test and online-test
  • Design-For-Test, DFT methodology
  • Test costs and test quality
  • Test standards such as IEEE 1149.x, IEEE 1687.x, IEEE P1838

Interested contributors should summarize their work onto not more than 2 pages, which can be submitted via the Easychair system. The contribution should describe the purpose, the novelty and practical applications of the work. Accepted papers can be published in the informal workshop handout if requested. For this purpose, the contribution could be extended to 4 pages.

The language of the Workshop is German. But, contributions and presentations in English are welcome as well.

Paper Submission

  • Compact presentation of the research results
  • Maximum two pages (DIN A4) incl. pictures and bibliography
  • Accepted papers will automatically be included in the conference proceedings (without ISBN). These can be extended to up to four pages
  • Submission website:

Camera-ready version for printing

  • Submission as PDF file (2-4 pages, DIN A4)
  • IEEE templates are recommended
  • Please do not use page numbers or headers, typefaces must be embedded and images should be in sufficient print quality






Regular Presentations

Regular presentations should last around 20 minutes. There will be 5 additional minutes for questions. Presenters should prepare their presentation as a PDF or PowerPoint document. The presentations can be copied to the presentation computer on site.


Authors of contributions that were accepted as posters should prepare a poster (DIN A0, portrait format) and max. 2 content slides to present the poster in a max. 7 minutes pitch. The presentation slides can be copied to the presentation computer on site.


Registration for the TuZ workshop takes place via the VDE website. Registration site

Students and scholarship holders (scholarship recipients without a regular employment contract) can participate at particularly favorable conditions.

Hotel special price agreement 2024

In connection with TuZ, TU Darmstadt has negotiated special conditions for overnight stays with the following hotels:

  • Maritim Hotel
  • Welcome Hotel
  • Intercity Hotel
  • Felix Hotel
  • THE Darmstadt

For details please contact the IES secretariat

Overview registration options

Registration option Registration fees
(Early bird until 28 January 2024)
Registration fee
(Late registration starts at 29 January 2024)
Member VDE/VDI/GI/GMM* EUR 290,00 € EUR 330,00 €
Non-member EUR 320,00 € EUR 360,00 €
Student/scholarship holder* without regular employment contract EUR 80,00 € EUR 120,00 €

* Discount only when sending a copy of the VDE/VDI/GI membership card or the student card/scholarship holder confirmation.

The conference fees include the printed conference proceedings, drinks during breaks, lunch & dinner as well as the social event. The conference pass and the conference documents will be issued on site.

The workshop will take place at the Georg-Christoph-Lichtenberg-Haus of the TU Darmstadt.


Dieburger Straße 241, 64287 Darmstadt

Directions to the Georg-Lichtenberg-Haus


A room contingent for TuZ 2024 paticipants has been reserved at the Welcome Hotel. Rooms can be booked with the keyword „TUZ24“ here.

Members of the Program Committee:

  • J. Alt, Infineon Technologies AG
  • H. Amrouch, TU München
  • B. Becker, University of Freiburg
  • R. Drechsler, University of Bremen and DFKI
  • S. Eggersglüß, Siemens Digital Industries Software
  • P. Engelke, Infineon Technologies AG
  • G. Fey, TU Hamburg
  • A.-P. Fonseca Müller, Bosch Sensortec GmbH
  • M. Gössel, University of Potsdam
  • S. Hellebrand, University of Paderborn
  • K. Hofmann, TU Darmstadt
  • S. Holst, Kyushu Institute of Technology
  • W. Hoppe, Rheinmetall AG
  • S. Huhn, Siemens Digital Industries Software
  • M. Kampmann, Siemens Digital Industries Software
  • R. Krenz-Baath, Hamm-Lippstadt University of Applied Sciences
  • M. Krstic, University of Potsdam and IHP GmbH
  • V. Petrovic, HDL Design House
  • L. Bolzani Poehls, RWTH Aachen University
  • I. Polian, University of Stuttgart
  • F. Pöhl, Frank Poehl Consulting
  • S. Sattler, University of Erlangen-Nuremberg
  • M. Sauer, Advantest Europe GmbH
  • M. Schillinsky, NXP Semiconductors Germany GmbH
  • H. Schmidt, IBM Germany GmbH
  • M. Schölzel, Nordhausen University of Applied Sciences
  • J. Sepulveda, Airbus Defence and Space
  • M. Tahoori, KIT
  • D. Tille, Infineon Technologies AG
  • M. Wahl, University of Siegen
  • H.-J. Wunderlich, University of Stuttgart
Sunday 25th February 2024
18:00 – 20:00 Dinner
Restaurant Grohe
Nieder-Ramstädterstr. 3
64283 Darmstadt
20:00 – 21:30 Public meeting of the GI/GMM/ITG-section “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”
TU Darmstadt
Department IES
S3|06 346
Merckstr. 25
64283 Darmstadt
Monday 26th February 2024
7:30 – 8:30 Registration
Guesthouse Georg-Christoph-Lichtenberg
Dieburger Straße 241
64287 Darmstadt
8:30 – 9:40 Opening and Keynote I
Chair: Ilia Polian, Institute for Computer Architecture and Computer Engineering, University of Stuttgart
“Testen – ein Blick zurück und voraus”
Bernd Becker
University of Freiburg, Freiburg, Germany
10:10 – 11:25 Session 1 – Fault Tolerance and Security
Chair: Jürgen Alt, Infineon Technologies AG, Neubiberg
Ein Ansatz zur Optimierung konfigurierbarer fehlertoleranter Systeme
Markus Ulbricht* und Milos Krstic*^
* IHP – Leibniz-Institut fur innovative Mikroelektronik, Frankfurt (Oder), Deutschland
^ Universitat Potsdam, Potsdam, Deutschland
Employing Optical Beam-induced Current Measurement in Side-channel Analysis
Dmytro Petryk*, Ievgen Kabin*, Jan Bělohoubek^§, Petr Fišer^, Jan Schmidt^, Milos Krstic*° und Zoya Dyka*~
* IHP – Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany
^ Czech Technical University, Prague, Czech Republic
§ University of West Bohemia, Pilsen, Czech Republic
° University Potsdam, Potsdam, Germany
~ BTU Cottbus-Senftenberg, Cottbus, Germany
Enhancing Resilience against Sequential Attacks on Logic Locking using Evolutionary Strategies
Marcel Merten*, Mohammed Djeridane*, Muhammad Hassan*^, Niladri Bhattacharjee§, Jens Trommer§, Thomas Mikolajick§° und Rolf Drechsler*^
* University of Bremen, Germany
^ Cyber-Physical Systems, DFKI GmbH, Bremen, Germany
§ NaMLab gGmbH, Dresden, Germany
° TU Dresden, Dresden, Germany
11:25 – 12:40 Session 2: Design for Testability
Chair: Rene Krenz-Baath
Hamm-Lippstadt University of Applied Sciences
An Evolutionary Approach to Reconfigurable Scan Network Design
Payam Habiby*, Fatemeh Shirinzadeh* und Rolf Drechsler*^
* Cyber-Physical Systems, DFKI GmbH
^ University of Bremen, Germany
Accelerating IJTAG Network Operations With FastIJTAG
Matthias Kampmann*
* Siemens Digital Industries Software, Hamburg, Germany
The Capabilities of Functional Path Ring Oscillators for Performance Screening
Tobias Kilian*^, Daniel Tille*, Martin Huch* und Ulf Schlichtmann^
* Infineon Technologies AG, Neubiberg, Germany
^ Chair of Electronic Design Automation, Technical University of Munich, Munich, Germany
12:40 – 13:30 Lunch
13:30 – 14:00 Poster 1 / Pitch Session 1:
Chair: Sebastian Huhn, Siemens EDA GmbH
A predictive neural network for test time and cost reduction
Lisa Taubensee*, Yiwen Liao*, Matthias Sauer* und Sarah Rottacker*
* Applied Research and Venture Team, Advantest Europe GmbH, Germany
Combining Stochastic Computing and Adversarial Attack Detection to Protect Neural Network Inference Hardware
Chandramouli Amarnath*, Florian Neugebauer^, Ilia Polian^ und Abhijit Chatterjee*
* Department of ECE, Georgia Institute of Technology
^ Institute for Computer Architecture and Computer Engineering, University of Stuttgart
ATPG-Based Die-to-Die Interconnect Test Coverage in 3D Stacked ICs(PhD Forum)
Naim Lemar, Racyics GmbH
Software-based Self-Test Generation for RISC-V
Tobias Faller*, Bernd Becker*
* University of Freiburg, Department of Computer Science – Freiburg, Germany
(accompanying keynote 1 with poster only)
14:00 – 14:45 Poster-Session 1 & Coffee Break
14:45 – 16:00 Session 3 – Reliability
Chair: Matthias Kampmann, Siemens EDA GmbH
Modeling Crosstalk-induced Interconnect Delay with Polynomial Regression
Alisa Stiballe*, Jan Dennis Reimer*, Somayeh Sadeghi Kohan* und Sybille Hellebrand*
* Computer Engineering Group EIM/E, Paderborn University, Germany
Crosstalk-Aware Simulation of Interconnects Using Artificial Neural Networks
Magdalina Ustimova*, Somayeh Sadeghi-Kohan* und Sybille Hellebrand*
* Paderborn University, Germany
Analysing Transistor Aging Impact on the Behavior of RRAM Cells
Seyed Hossein Hashemi Shadmehri*, Thiago Santos Copetti* und Letícia Maria Bolzani Poehls*
* Chair of Integrated Digital Systems and Circuit Design, RWTH Aachen University Aachen, Germany
16:00 Departure in our own bus to
GSI Schwerionenforschung GmbH.
After the tour, the bus will return to the venue or hotel.
Important: Please have your passport or identity card ready. No admission without this!
19:00 Meeting at Ratskeller
Marktplatz 8
64283 Darmstadt
Tuesday 27th February 2024
9:00 – 10:00 Keynote II
Chair: Klaus Hofmann, TU Darmstadt
“Form follows function – from LCD-TV to Molecular Electronics”
Peer Kirsch
Merck Electronics KGaA/TU Darmstadt, Germany
10:00 – 10:30 Poster 2 / Pitch Session 2
Chair: Payam Habiby, Cyber-Physical Systems, DFKI GmbH
Investigating the SEU influence on a selectively-hardened complex digital filter
Anselm Breitenreiter*, Thomas Lange^, Ernesto Pun§, Carsten Schulze*, Fabian Vargas* und Milos Krstic*
* IHP – Leibniz Institute for High Performance Microelectronics, Frankfurt Oder, Germany
^ Iroc Technologies, Grenoble, France
§ Arquimea Aerospace, Defense & Security Leganés, Spain
IPTC, ETSI Telecomunicación, Universidad Politécnica de Madrid, Spain
Tag-based Hardware Information Flow Tracking
Lutz Schammer*, Gianluca Martino* und Goerschwin Fey*
* Institute of Embedded Systems, Hamburg University of Technology, Hamburg, Germany
Verifikation von Analog Mixed-Signal Systemen unter Berücksichtigung von Variationen
Jan Rödel^, Carna Zivkovic^, Neha Chavan^, Frank Rethmeier^, Sören Kwasigroch* und Christoph Grimm*
^ NXP Semiconductors, Hamburg, Germany
* University of Kaiserslautern, Kaiserslautern, Germany
10:30 – 11:10 Poster-Session 2 & Coffee Break
11:10 – 13:00 Session 4 – Test generation and execution
Chair: Mario Schölzel, HS Nordhausen
Large Language Models to Generate System-Level Test Programs Targeting Non-functional Properties
Denis Schwachhofer*°, Peter Domanski^, Steffen Becker*, Stefan Wagner*, Matthias Sauer§, Dirk Pflüger^ und Ilia Polian°
* Institute of Software Engineering, University of Stuttgart, Stuttgart, Germany
^ Institute for Parallel and Distributed Systems, University of Stuttgart, Stuttgart, Germany
§ Advantest Europe, Boeblingen, Germany
° Institute of Computer Engineering and Computer Architecture, University of Stuttgart, Stuttgart, Germany
Automatisierte Ausführungsemulation von Testprogrammen für Sensorsysteme
Franziska Mayer*, Christian Schott*, Erik Markert* und Ulrich Heinkel*
* Professur für Schaltkreis- und Systementwurf, Technische Universität Chemnitz, Chemnitz, Deutschland
Design and validation of an FPGA adapter board for high-speed testing of DRAM memory ICs
Philipp Gebhart*, David Riehl* und Klaus Hofmann*
* Integrated Electronic Systems Lab, Technische Universitat Darmstadt, Germany
Evaluierung und Test von GNSS-Empfängern mit realen und synthetischen Satellitensignalen
Bjoern Bieske*, Stehr Uwe^, Matthias Hein^ und Syed N. Hasnain^
* IMMS GmbH, Ilmenau, Germany
^ TU Ilmenau / ThIMo, Ilmenau, Germany
13:00 – 13:15 Closing Remarks
13:15 – 14:15 Lunch

Testen – ein Blick zurück und voraus

Bernd Becker
Universität Freiburg

Mikro- und Nanoelektronik sind Treiber unserer zunehmend digitalen und vernetzten Gesellschaft. Methoden zur Gewährleistung von Sicherheit und Zuverlässigkeit gewinnen noch mehr an Bedeutung.

Wir blicken daher zunächst zurück auf Probleme, Fragestellungen und Lösungs-ansätze, die uns im Bereich Testen und angrenzenden Gebieten seit 1985 beschäftigt haben und zeigen dann auf, inwieweit sie auch bei heutigen eingebetteten Systemen von Relevanz sind und welche (neuen) Herausforderungen und Chancen sich bieten.


Bernd Becker erhielt das Diplom (1979) und den Doktortitel (1982) in Mathematik und Informatik von der Universität des Saarlandes in Saarbrücken, Deutschland. Von 1989-1995 war er an der J.W. Goethe-Universität Frankfurt als Professor für Komplexitätstheorie und effiziente Algorithmen tätig. Seit 1995 ist er Professor an der Universität Freiburg und war bis zu seinem Eintritt in den Ruhestand 2021 Leiter des Lehrstuhls für Rechnerarchitektur an der Technischen Fakultät.

Er hat mehr als 500 wiss. Arbeiten publiziert und mehr als 30 Doktoranden betreut, die heute führende Positionen in der Industrie und an Universitäten innehaben. Seine Forschungsaktivitäten liegen hauptsächlich im Bereich des computergestützten Entwurfs, des Tests und der Verifikation von (digitalen) Schaltungen und Systemen. In jüngerer Zeit hat er sich mit der Verifikation von Sicherheitsfragen für eingebettete Systeme und mit Testtechniken für nanoelektronische Schaltungen befasst. Er hat zahlreiche Drittmittelprojekte eingeworben, so war er von 2003 bis 2015 Co-Sprecher des Transregio-Sonderforschungsbereichs "Automatic Verification of Complex Systems (AVACS)“. Bernd Becker ist Fellow von IEEE und Mitglied von Academia Europaea.

Form Follows Function: From LCD-TV to Molecular Electronics

Peer Kirsch
R&D Fellow, Merck Electronics KGaA
Joint Industrial Professor, TU Darmstadt

Tunnel junctions based on liquid crystal-inspired self-assembled monolayers (SAM) show bistable and reversible resistance switching. Originally, this technology was developed for non-volatile memory, but it also has potential for application in neuromorphic computing. Fabrication and processing of SAM-based devices is extremely simple since the complexity of their functionality can be designed into the molecular building blocks. Whereas the first generation of devices exhibited a very noisy electrical current-voltage characteristics, the design of a new molecular scaffold resulted in clean and reversible resistance switching, which is potentially suitable for multi-level or even analog operation. Future activities are directed towards integrating SAM-based tunnel junctions into novel computational architectures for neuromorphic and quantum computing.


Peer Kirsch is currently R&D Fellow in the materials research department of Merck Electronics KGaA, Darmstadt, where he is responsible for the development of new materials for the electronics industry.
After studying chemistry at the University of Heidelberg he completed his doctoral thesis at the Max Planck Institute for Medical Research on a topic in bioorganic chemistry. In a subsequent postdoctoral stay at the RIKEN Institute in Japan as Feodor Lynen Fellow of the Alexander von Humboldt Foundation he worked on the synthesis of glycoconjugates. In 1995 he entered the Liquid Crystal division at Merck, where he focused on design and synthesis of fluorinated, nematic liquid crystals for display applications. In parallel to his industrial activities, he obtained in 2001 his habilitation at the University of Bremen. From 2005 to 2010 he established a liquid crystal application lab as well as a central R&D and business development unit at Merck Ltd. Japan in Tokyo. After his return to Germany, he extended his scientific interests to various other types of functional materials. His interests include organic semiconductors, multi-functional dyes, ionic liquids, self-assembled monolayers as well as the application of quantum chemical methods for materials design.
Since 2021, he is Joint Industrial Professor for Organic Electronics at the TU Darmstadt. Kirsch is author of more than 180 patents, numerous publications as well as a textbook on Fluoroorganic Chemistry.