PEM I is about practical experience in the field of methodical approach to the development of technical products, as well as working in a project team.
The development methodology is applied to a concrete project in a team. For example, the students have to abstract the given task and analyze the state of the art in order to write a list of requirements and to work out individual sub-problems. At the end of the module, as can be seen in the pictures, a fully functional laboratory prototype should have been created with the help of a sensible overall concept.
The aim of this lab is to gain deep knowledge and practical experiences in the field of full-custom CMOS ASIC design by using a professional commercial software tool (Cadence Virtuoso).
The following aspects will be considered:
- Design entry and validation of functional blocks at the transistor level
- Logic and analog simulation
- Layout design
- Post-layout simulation of extracted netlists