David Riehl M.Sc.

Contact

work +49 6151 16-20253

Work S3|06 352c
Merckstr. 25
64283 Darmstadt

Research and Work Area

DFG Project: “Sensor-integrated bolts for multiaxial force measurement and derivation of a design methodology for sensor integration in closed cylindrical machine elements (SiSmaK)”

LOEWE 3 Project: “Nanowire based Interconnect Technology for High Performance DRAM Products (NanoNIT)”

LOEWE 3 Project: “Highly Innovative DRAM Test & Development Methodology (HIDTest)”

Accompanying Lectures: “Electronics Lab”, “Biomedical Engineering Lab”

Short Bio

Since 2020 Doctoral candidate and Research & Teaching Assistant at the Integrated Electronic Systems Lab, TU Darmstadt, Germany
2017 – 2020
 Master of Science in Electrical Engineering, TU Darmstadt, Germany
Thesis: “Compact Modelling of Electrostatically Doped Ambipolar Reconfigurable Field-Effect Transistors”
2013 – 2017
 Bachelor of Science in Electrical Engineering, TU Darmstadt, Germany
Thesis: “Design of an Inductively Coupled Energy and Data Transmission System for Torque Sensors Integrated in Hollow Shafts”

Publications

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View complete list at TUbiblio View this list at TUbiblio

Supervised student projects:

Mohammad Zidan Design and validation of a low-cost interposer concept for DRAM ICs Seminar A
Christian Euller Comparision of Battery-Technologies for Long-Term use in Harsh Enviroments Proseminar
Henri Busch Comparison of efficient implementations of Natural Neighborhood Interpolation for multivariate scattered datasets Proseminar
Kim Leidolf Investigation of the relationship between retention time and timings of DRAM Bachelorthesis
Timo Oster Nonlinear De-Embedding for Acquisition of High-Speed Signals Masterthesis
David Witulla Entwurf und Evaluierung einer kostengünstigen Audio-Endstufe Bachelorthesis
Silvija Vujinovic Integration eines Pick-and-Place-Heads und einer Kraftregelung in eine 3-Achsen-CNC-Maschine Bachelorthesis
Kim Leidolf Design of a temperature controlled chamber Seminar
Mohith Kumar Narasimharaju An FPGA-based approach to Test and Debug DDR3 On-Chip Memory failures Masterthesis
Kim Leidolf Investigation of DRAM failure mechanisms and design ideas for a FPGA based DRAM tester Projectseminar
Abdenassir
El Amin 		Vergleichende Untersuchung des Verschleißes von BGA-Sockeln auf der Grundlage ihres Kontaktwiderstandes Bachelorthesis
Abdenassir
El Amin 		Entwicklung eines Messaufbaues zur automatisierten Bestimmung des Kontaktwiderstandes von BGA Sockeln Projectseminar
Abdenassir
El Amin 		Vergleich von Messschaltungen und Messverstärkerschaltungen zur Messung der Kontaktwiderstände von BGA Sockeln Proseminar
Jan Hämmelmann Equation Based Modelling of Ambipolar Reconfigurable Transistors using Genetic Programming Projectseminar